[ntp:questions] how do I lock in average frequency correction

Garrett Wollman wollman at bimajority.org
Wed Feb 15 06:04:42 UTC 2012

In article <4F39FD1A.6020905 at c3energy.com>,
Ron Frazier (NTP) <timekeepingntplist at c3energy.com> wrote:

>Perhaps a silly question, but, does the "tick" that drives the OS 
>software clock originate from the RTC or from the CPU master clock at 2 
>GHz or whatever?  Just trying to understand how this stuff works.

Customarily, there's a really cheap crystal oscillator on the
motherboard, and all of the other frequencies on the system -- except
for the battery-backed RTC clock -- are generated by a clock-generator
circuit which uses that frequency as a reference.

Historically, the PC used frequencies which were convenient multiples
of the NTSC colorburst frequency, because NTSC crystals were really
cheap.  Today's PCs tend to use a 14.31818 MHz (4*NTSC) crystal
instead, and the chipset has a clock generator to generate 1/3 NTSC to
drive the emulated Intel 8254 programmable interval timer which is
what drives traditional timer interrupts.  Modern machines have at
least four other timing sources: the CPU's cycle counter (TSC), the
ACPI timer, one more more high-precision event timers (HPETs), and the
battery-backed real-time clock (RTC).  On my machine, the ACPI timer
runs at 3.579545 MHz and the HPET runs at 14.318180 MHz.

All of these have issues, starting with the fact that they run at
inconvenient rates.  The CPU cycle counter varies widely in quality,
depending on the design of the motherboard, CPU, BIOS, and operating
system.  (Some CPUs run the cycle counter at a constant frequency
regardless of the actual CPU clock dictated by power management; some
CPUs don't count cycles spent in system-management mode;
multiprocessors are generally a hard case.)  The ACPI timer depends on
the quality of the BIOS's ACPI implementation, but is guaranteed to be
power-state invariant, and there's only one of them per system so the
multiprocessor issues are tractable.  The HPET is not universally
supported yet, and my FreeBSD system at least considers the ACPI timer
to be higher "quality".  The 8254 is extremely slow despite being
implemented in the motherboard chipset; the emulation replicates the
speed of ISA-bus I/O -- but it can generate interrupts.  The RTC can
generate interrupts, but only at power-of-two frequencies, it's also a
slow ISA-emulating device, and the counter that generates the
interrupts can't be read so no interpolation is possible.

Modern operating systems are moving towards "tickless" operation to
improve power efficiency.  This requires an on-board timing device
that has sufficient range and stability to accurately determine the
amount of time that has elapsed between two non-periodic interrupts,
so that the clock can be advanced by the correct amount.

Garrett A. Wollman    | What intellectual phenomenon can be older, or more oft
wollman at bimajority.org| repeated, than the story of a large research program
Opinions not shared by| that impaled itself upon a false central assumption
my employers.         | accepted by all practitioners? - S.J. Gould, 1993

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