[ntp:hackers] [Gpsd-dev] A lightweight synchronization mechanism for shared memory

Gary E. Miller gem at rellim.com
Fri Mar 25 17:19:30 UTC 2011


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Yo dave!

On Fri, 25 Mar 2011, Dave Hart wrote:

> My recollection is that MIPS R4000, Alpha, or both do not support
> byte-wide access, instead emitting load aligned destination word into
> register, twiddle the byte into the register, then store aligned
> destination word.  By "word" I mean unsigned int, essentially, or
> possibly 32-bit on 64-bit processors.

Having actually programmed MIPS and Alpha I can comfirm this misfeature.

It was a PITA to work around.


RGDS
GARY
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Gary E. Miller Rellim 109 NW Wilmington Ave., Suite E, Bend, OR 97701
	gem at rellim.com  Tel:+1(541)382-8588

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