[ntp:questions] A proposal to use NIC launch time support to improve NTP
ulf at invalid.com
Thu Dec 20 11:28:51 UTC 2012
On 2012-12-19 22:49, Brian Utterback wrote:
> On 12/19/12 14:05, unruh wrote:
>> On 2012-12-19, Hal Murray<hal-usenet at ip-64-139-1-69.sjc.megapath.net>
>>> In article<50D1C5B9.8020701 at oracle.com>,
>>> Brian Utterback<brian.utterback at oracle.com> writes:
>>>> No, you are missing the point. You have two clocks in this scenario,
>>>> kernel clock and the network controller clock. If one gets a good time
>>>> then you have to set the other from it. This means that this time will
>>>> have to travel over the PCI bus which will introduce jitter.
>>>> Now, if you have a PPS signal available and can provide it to both the
>>>> network controller and the kernel, then you don't have this problem
>>>> since the PPS signal will sync the time to an accuracy better than the
>>>> jitter that was introduced.
>>> Doesn't the PPS signal to the kernel have to go over the same PCI bus?
>>> I'd guess that you would get better results from a network card.
>>> That's assuming it has a good clock. All you have to do is read
>>> a counter. There is no interrupt latency. You can also read it
>>> several times and pick the best one.
>> Pick the best one? How would you know what the best one was?
>> Not sure what you mean by a "good clock". It certainly will not be an
>> accurate clock. It may be one whose drift rate is not too bad, although
>> I suspect it will change with temperature.
> Generally, the PPS signal does not go over the PCI bus. The kernel gets
> its PPS signal via the serial port. You would therefore like the
> controller to have its own PPS signal input, but I don't see one in the
There are a couple of GPIOs on the part, and you can capture when they
toggle. Then you can tweak the clock up and down, until you
capture GPIO the toggle at the same time as the SYSTIM counter ns part
wraps around from 999,999,999 to 0.
Then you have synchronized the SYSTIM with the PPS signal.
> So you are back to worrying about the sync of the kernel clock and the
> controller clock. It might not matter too much, but it will kind of
> depend on how the receive timestamp is obtained from the card. The
> receive timestamp and transmit timestamp have got to be on the same time
> source or you could run into problems.
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