[ntp:questions] serialPPS+gpsd+ntpd large offset & jitter

Mike S mikes at flatsurface.com
Thu Jan 13 23:59:38 UTC 2011


At 02:00 AM 1/13/2011, Terje Mathisen wrote...

>Not quite true:
>
>Many OSs use the 32768 Hz clock, suitably subdivided to something like 
>1024 Hz or 64 Hz (pretty common Windows SMP kernel) as the main timer 
>interrupt.

If you do a bit of research, I think you'll find that the 32768 Hz 
input to the RTC clock isn't even exposed on most PCs. A battery 
supported RTC was simply not a part of the original PC architecture. 
I'd like to see some support for your claim, because I couldn't find 
any.

Someone mentioned HPET being used in more modern PCs/OSs, but 
traditionally system real time has been kept with "tics" sourced from 
the functional equivalent of an 8254/8259 PIC. The crystal driving 
these is almost always at 14.31818 MHz, which gets divided/counted down 
to ~18.2 Hz timer tic interrupts (65536/hr). This architecture goes 
back to the original IBM PC.

Similarly, the HPET clock is almost universally derived from a 14.31818 
MHz crystal. As Intel said in their HPET specification: "The IA-PC HPET 
Specification defines timer hardware that is intended to initially 
supplement and eventually replace the legacy 8254 Programmable Interval 
Timer and the Real Time Clock Periodic Interrupt generation functions 
that are currently used as the 'de-facto' timer hardware for IA-PCs."

If trying to improve the system time stability of a PC, the first thing 
to look for is a 14.31818 MHz crystal (there may be several) near the 
"south bridge" chip. Improving the 32768 Hz crystal is likely to make a 
difference only when the PC is powered off. 




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